1. The other architecture group is called hybrid architecture, which includes: Non-Uniform Memory Architecture (NUMA), which involves the non-uniform memory access.

2. Memory management method and apparatus for multi-step non-uniform memory access numa architecture

3. Virtualization does not work on some architectures that use Non-Uniform Memory Access (NUMA).

4. There are many examples of shared memory (multiprocessors): UMA (Uniform Memory Access), COMA (Cache Only Memory Access).

5. - Does not support Uniform Memory Access (UMA) graphics;

6. A system that does not have this property is known as a non-uniform memory access (NUMA) architecture.

7. (3) does not support uniform memory access (UMA) graphics;

8. Do not provide support for Uniform Memory Access (UMA) graphics;

9. To maintain a high level of performance in modern parallel architectures, High Performance Fortran also provides non-uniform memory access capabilities.

10. Magnetoresistive random-access memory (MRAM) is a non-volatile random-access memory technology available today that began its development in mid-1980s.

11. Platform storage hierarchy with non-volatile random access memory having configurable partitions

12. Under NUMA, a processor can access its own local memory faster than non-local memory (memory local to another processor or memory shared between processors).

13. Dynamic random access memory and random access memory cards

14. The memory access module includes a plurality of parallel memory access channels.

15. Magnetic memory cell and magnetic random access memory

16. Dynamic random access memory

17. Random access memory capacity:

18. Direct memory access controller

19. Access to memory region including confidential information access to memory region including confidential information

20. The first memory block (22) of non-volatile memory comprises a plurality of word locations and an address decoder (201) coupled to a first access port of the memory controller (26).

21. - NON-ABSOLUTE CONTENT ADDRESSABLE MEMORY .

22. Both Direct Memory Access (DMA) and non-DMA hardware can be supported with the one or more embodiments.

23. Memory access and data control

24. Allocating memory access control policies

25. Calibration of read/write memory access via advanced memory buffer

26. Method and memory controller for scalable multi-channel memory access

27. Access to the memory channels is controlled by memory controllers.

28. In our method, uniform blocks are utilized to embed data in addition to non - uniform blocks.

29. Dynamic random access memory (DRAM) modules

30. Easier access to the organizational memory

31. Random access memory [ram]electronic cartridges

32. Access to a memory-programmable controller

33. Two transistor ternary random access memory

34. Memory access controller and computer system

35. The timing of memory access is defined in time-slots for access to the memory from respective ports.

36. This effect is called "selective recall", "confirmatory memory", or "access-biased memory".

37. Accesses to local memory are typically faster than accesses to non-local memory.

38. The 6502's memory access architecture had let developers produce fast machines without costly direct memory access (DMA) hardware.

39. Method of controlling virtual memory data access

40. Random access memory device, namely, ram card

41. Microprocessor architecture having alternative memory access paths

42. Shared memory circuit and access control method

43. Pipelined multi-access memory apparatus and method

44. RAM - (Random Access Memory) Memory available to the computer's processor to run programs.

45. Memory cards contain non-volatile memory storage components, and perhaps some specific security logic.

46. A memory device (100) comprises a memory array (102) having corresponding first access control bits (202, 204) to control access thereto.

47. A non-volatile random access memory (NVRAM) is used in a computer system to perform multiple roles in a platform storage hierarchy.

48. In some embodiments, a memory controller includes first and second memory channel interfaces and memory access control circuitry.

49. Enhanced write abort mechanism for non-volatile memory

50. Multi-mode memory access techniques for performing graphics processing unit-based memory transfer operations

51. The memory element access device is connected in parallel to the resistive memory element.

52. Get an access pointer to the allocated memory.

53. Resistance-based memory having two-diode access device

54. Chip card with memory access maximisation and logging

55. Static random access memory and driving method therefor

56. Beaucoup: Approximate Distinct Counting with Limited Memory Access

57. I'm talking about access to your own memory.

58. Memory access method, system and bus arbitration device

59. Method and apparatus for off boundary memory access

60. Control method and device of memory interface access

61. Note 2:«CEs» share memory if they access a common segment of solid state memory.

62. Note 2:"CEs" share memory if they access a common segment of solid state memory.

63. Non-metallic access floor panels

64. Apparatus and method for programmable memory access slot assignment

65. Flash memory access using a plurality of command cycles

66. Redundancy circuits preserve data integrity without memory access interruption.

67. Access method and device for message-type memory module

68. Memory device and method for parallel optical data access

69. Memory card-based conditional access system for mobile broadcast

70. Very few people have access to the memory device.

71. The control signals are sent to the dynamic memory devices to service the memory access request.

72. Multi-bit block write in a random access memory

73. The transfer function of an acoustic echo path is usually very non-uniform.

74. Random access memory for use in an emulation environment

75. The memory array is divided into memory blocks, each block having a corresponding access control bit.

76. Method and system for providing a high density memory cell for spin transfer torque random access memory

77. The processing unit determines whether to access the access filter for a given memory request.

78. The website has a standard structure in its menus, making information access uniform.

79. Disclosed is a method and apparatus for an off boundary memory to provide off boundary memory access.

80. Pauses Windows Memory Diagnostic. To access the additional menu options, you must first pause Windows Memory Diagnostic.